as3993 ST25RU3993 Firmware
as3993.h
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1 /*
2  *****************************************************************************
3  * AS3993/ST25RU3993 Firmware tech@eleckits.com http://iot.eleckits.com *
4  * STMicroelectronics ST25RU3993 is an EPC Class 1 Gen 2 RFID reader IC *
5  * *
6  * IMPORTANT - PLEASE READ CAREFULLY BEFORE COPYING, INSTALLING OR USING *
7  * THE SOFTWARE. *
8  * *
9  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS *
10  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT *
11  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS *
12  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT *
13  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
14  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT *
15  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, *
16  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY *
17  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
18  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE *
19  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
20  *****************************************************************************
21  */
36 #ifndef _AS3993_H_
37 #define _AS3993_H_
38 
39 #include "global.h"
40 #include "ams_types.h"
41 #include "as3993_config.h"
42 
43 #define AS3993_REG_STATUSCTRL 0X00
44 #define AS3993_REG_PROTOCOLCTRL 0X01
45 #define AS3993_REG_TXOPTIONS 0X02
46 #define AS3993_REG_RXOPTIONS 0X03
47 #define AS3993_REG_TRCALHIGH 0X04
48 #define AS3993_REG_TRCALLOW 0X05
49 #define AS3993_REG_AUTOACKTIMER 0X06
50 #define AS3993_REG_RXNORESPONSEWAITTIME 0X07
51 #define AS3993_REG_RXWAITTIME 0X08
52 #define AS3993_REG_RXFILTER 0X09
53 #define AS3993_REG_RXMIXERGAIN 0X0A
54 #define AS3993_REG_REGULATORCONTROL 0X0B
55 #define AS3993_REG_RFOUTPUTCONTROL 0X0C
56 #define AS3993_REG_MISC1 0X0D
57 #define AS3993_REG_MISC2 0X0E
58 #define AS3993_REG_MEASUREMENTCONTROL 0X10
59 #define AS3993_REG_VCOCONTROL 0X11
60 #define AS3993_REG_CPCONTROL 0X12
61 #define AS3993_REG_MODULATORCONTROL1 0X13
62 #define AS3993_REG_MODULATORCONTROL2 0X14
63 #define AS3993_REG_MODULATORCONTROL3 0X15
64 #define AS3993_REG_MODULATORCONTROL4 0X16
65 #define AS3993_REG_PLLMAIN1 0X17
66 #define AS3993_REG_PLLMAIN2 0X18
67 #define AS3993_REG_PLLMAIN3 0X19
68 #define AS3993_REG_PLLAUX1 0X1A
69 #define AS3993_REG_PLLAUX2 0X1B
70 #define AS3993_REG_PLLAUX3 0X1C
71 #define AS3993_REG_ICD 0X1D
72 #define AS3993_REG_MIXOPTS 0X22
73 #define AS3993_REG_TEST1 0X23
74 #define AS3993_REG_TEST2 0X24
75 #define AS3993_REG_TEST3 0X25
76 #define AS3993_REG_TEST4 0X26
77 #define AS3993_REG_TXRESHAPE 0X27 /* ? */
78 #define AS3993_REG_STATUSPAGE 0X29
79 #define AS3993_REG_AGCANDSTATUS 0X2A
80 #define AS3993_REG_RSSILEVELS 0X2B
81 #define AS3993_REG_AGL 0X2C
82 #define AS3993_REG_ADC 0X2D
83 #define AS3993_REG_COMMANDSTATUS 0X2E
84 #define AS3993_REG_DEVICEVERSION 0X33
85 #define AS3993_REG_IRQMASK1 0X35
86 #define AS3993_REG_IRQMASK2 0X36
87 #define AS3993_REG_IRQSTATUS1 0X37
88 #define AS3993_REG_IRQSTATUS2 0X38
89 #define AS3993_REG_FIFOSTATUS 0X39
90 #define AS3993_REG_RXLENGTHUP 0X3A
91 #define AS3993_REG_RXLENGTHLOW 0X3B
92 #define AS3993_REG_TXSETTING 0X3C
93 #define AS3993_REG_TXLENGTHUP 0X3D
94 #define AS3993_REG_TXLENGTHLOW 0X3E
95 #define AS3993_REG_FIFO 0X3F
96 
97 //Reader commands-------------------------------------------
98 #define AS3993_CMD_IDLE 0x80
99 #if RUN_ON_AS3993
100 #define AS3993_CMD_DIRECT_MODE 0x81
101 #endif
102 #define AS3993_CMD_SOFT_INIT 0x83
103 #define AS3993_CMD_HOP_TO_MAIN_FREQUENCY 0x84
104 #define AS3993_CMD_HOP_TO_AUX_FREQUENCY 0x85
105 #define AS3993_CMD_TRIGGERADCCON 0x87
106 #define AS3993_CMD_TRIG_RX_FILTER_CAL 0x88
107 #define AS3993_CMD_INC_RX_FILTER_CAL 0x89
108 #define AS3993_CMD_DEC_RX_FILTER_CAL 0x8A
109 #define AS3993_CMD_TRANSMCRC 0x90
110 #define AS3993_CMD_TRANSMCRCEHEAD 0x91
111 #if RUN_ON_AS3993
112 #define AS3993_CMD_TRANSMNOCRC 0x92
113 #endif
114 #define AS3993_CMD_DELAY_TRANSMIT_CRC 0x93 /* ? */
115 #define AS3993_CMD_DELAY_TRANSMIT_NO_CRC 0x94 /* ? */
116 #define AS3993_CMD_CLOSE_SLOT_SEQUENCE 0x95 /* ? */
117 #define AS3993_CMD_BLOCKRX 0x96
118 #define AS3993_CMD_ENABLERX 0x97
119 #define AS3993_CMD_QUERY 0x98
120 #if RUN_ON_AS3993
121 #define AS3993_CMD_QUERYREP 0x99
122 #define AS3993_CMD_QUERYADJUSTUP 0x9A
123 #define AS3993_CMD_QUERYADJUSTNIC 0x9B
124 #define AS3993_CMD_QUERYADJUSTDOWN 0x9C
125 #endif
126 #define AS3993_CMD_ACK 0x9D
127 #define AS3993_CMD_NAK 0x9E
128 #define AS3993_CMD_REQRN 0x9F
129 #define AS3993_CMD_SUPPLY_AUTO_LEVEL 0xA2
130 #define AS3993_CMD_SUPPLY_MANUAL_LEVEL 0xA3
131 #define AS3993_CMD_VCO_AUTO_RANGE 0xA4
132 #define AS3993_CMD_VCO_MANUAL_RANGE 0xA5
133 #define AS3993_CMD_AGL_ON 0xA6
134 #define AS3993_CMD_AGL_OFF 0xA7
135 #define AS3993_CMD_STORE_RSSI 0xA8
136 #define AS3993_CMD_CLEAR_RSSI 0xA9
137 #define AS3993_CMD_ANTI_COLL_ON 0xAA
138 #define AS3993_CMD_ANTI_COLL_OFF 0xAB
139 
140 /*IRQ Mask register */
142 #define AS3993_IRQ1_NORESP 0x01
143 
144 #define AS3993_IRQ1_AUTOACK 0x02
145 
146 #define AS3993_IRQ1_HEADER 0x08
147 
148 #define AS3993_IRQ1_RXERR 0x10
149 
150 #define AS3993_IRQ1_FIFO 0x20
151 
152 #define AS3993_IRQ1_RX 0x40
153 
154 #define AS3993_IRQ1_TX 0x80
155 
157 #define AS3993_IRQ2_PREAMBLE 0x01
158 
159 #define AS3993_IRQ2_RXCOUNT 0x02
160 
161 #define AS3993_IRQ2_CRCERROR 0x04
162 
163 #define AS3993_IRQ2_END_CMD 0x40
164 
165 #define AS3993_IRQ2_END_ANA 0x80
166 
167 #define AS3993_IRQ1_MASK_ALL 0xfb
168 #define AS3993_IRQ2_MASK_ALL 0xc7
169 
170 /*AS3993_REG_FIFO STATUS register */
172 #define AS3993_FIFOSTAT_OVERFLOW 0x20
173 
174 #define RESP_NORESINTERRUPT AS3993_IRQ1_NORESP
175 #define RESP_AUTOACK AS3993_IRQ1_AUTOACK
176 #define RESP_HEADERBIT AS3993_IRQ1_HEADER
177 #define RESP_RXERR AS3993_IRQ1_RXERR
178 #define RESP_FIFO AS3993_IRQ1_FIFO
179 #define RESP_RXIRQ AS3993_IRQ1_RX
180 #define RESP_TXIRQ AS3993_IRQ1_TX
181 #define RESP_PREAMBLEERROR (AS3993_IRQ2_PREAMBLE << 8)
182 #define RESP_RXCOUNTERROR (AS3993_IRQ2_RXCOUNT << 8)
183 #define RESP_CRCERROR (AS3993_IRQ2_CRCERROR << 8)
184 #define RESP_END_CMD (AS3993_IRQ2_END_CMD << 8)
185 #define RESP_END_ANA (AS3993_IRQ2_END_ANA << 8)
186 
187 #if RUN_ON_AS3980 //as3980 produces irq_err2 (without irq_err) if new epc is read 500ms after last one.
188 #define RESP_RXDONE_OR_ERROR (RESP_RXIRQ | RESP_AUTOACK | RESP_RXERR | RESP_NORESINTERRUPT | RESP_RXCOUNTERROR)
189 #else
190 #define RESP_RXDONE_OR_ERROR (RESP_RXIRQ | RESP_AUTOACK | RESP_RXERR | RESP_NORESINTERRUPT)
191 #endif
192 /* RESP_FIFOOVERFLOW does not work reliably */
193 #define RESP_ANY (AS3993_IRQ1_MASK_ALL | (AS3993_IRQ2_MASK_ALL << 8))
194 
195 #define RSSI_MODE_REALTIME 0x00
196 #define RSSI_MODE_PILOT 0x04
197 #define RSSI_MODE_2NDBYTE 0x06
198 #define RSSI_MODE_PEAK 0x08
199 
200 #define AS3993_NOM_SENSITIVITY 68
201 /* Frequency offset for RSSI measurement.
202  * If the measured signal has the same frequency as the pll, I + Q is zero after mixing the signal.
203  * If the measured signal will differ with the pll frequency setting, the filtered mixed signal will be seen.
204  * This filtered mixed signal should have a maximum if pll frequency and signal frequency differ with this offset.
205  * Therefore, the offset has a dependency on the filter settings.
206  */
207 #define AS3993_RSSI_FREQUENCY_OFFSET 50
208 /* at 40kHz BLF one gen2 slot takes ~40ms, we are going to wait
209  * 50ms (in as3993WaitForResponse()) to be on the safe side. */
211 #define WAITFORRESPONSEDELAY 10
212 
213 #define WAITFORRESPONSETIMEOUT 50000
214 
215 #define WAITFORRESPONSECOUNT WAITFORRESPONSETIMEOUT/WAITFORRESPONSEDELAY
216 
217 
218 extern volatile u16 as3993Response;
219 extern u32 as3993CurrentBaseFreq;
220 
221 /*------------------------------------------------------------------------- */
225 void as3993SingleCommand(u8 command);
226 
227 /*------------------------------------------------------------------------- */
234 void as3993ContinuousRead(u8 address, s8 len, u8 *readbuf);
235 
241 void as3993FifoRead(s8 len, u8 *readbuf);
242 
247 u8 as3993SingleRead(u8 address);
248 
249 /*------------------------------------------------------------------------- */
255 void as3993ContinuousWrite(u8 address, u8 *buf, s8 len);
256 
261 void as3993SingleWrite(u8 address, u8 value);
262 
263 /*------------------------------------------------------------------------- */
275 void as3993CommandContinuousAddress(u8 *command, u8 com_len,
276  u8 address, u8 *buf, u8 buf_len);
277 
278 /*------------------------------------------------------------------------- */
281 void as3993WaitForResponse(u16 waitMask);
282 /*------------------------------------------------------------------------- */
285 void as3993WaitForResponseFAST(u16 waitMask);
286 /*------------------------------------------------------------------------- */
289 void as3993WaitForResponseTimed(u16 waitMask, u16 ms);
290 
291 #define as3993GetResponse() as3993Response
292 #define as3993ClrResponseMask(mask) as3993Response&=~(mask)
293 #define as3993ClrResponse() as3993Response=0
294 
295 #if RUN_ON_AS3993
296 
306 void as3993EnterDirectMode();
315 void as3993ExitDirectMode();
316 
317 #endif
318 
326 
335 
343 
351 
360 
368 
377 
385 
386 extern u8 as3993ChipVersion;
387 
394 void as3993WaitForStartup(void);
395 #endif /* _AS3993_H_ */
void as3993ExitDirectMode()
Leave the direct mode.
Definition: as3993.c:589
void as3993EnterPowerStandbyMode()
Enter the standby power down mode: EN is high, stby is high and rf_on bit is low. ...
Definition: as3993.c:835
void as3993EnterPowerNormalMode()
Enter the normal power mode: EN is high, stby and rf_on bits are low.
Definition: as3993.c:805
void as3993WaitForResponse(u16 waitMask)
Definition: as3993.c:543
This file provides declarations for global helper functions.
void as3993ContinuousWrite(u8 address, u8 *buf, s8 len)
Definition: as3993.c:492
void as3993WaitForResponseTimed(u16 waitMask, u16 counter)
Definition: as3993.c:526
void as3993SingleWrite(u8 address, u8 value)
Definition: as3993.c:500
void as3993FifoRead(s8 len, u8 *readbuf)
Definition: as3993.c:465
void as3993EnterPowerNormalRfMode()
Enter the normal power mode with rf on. EN is high, stby bit is low and rf_on bit is high...
Definition: as3993.c:820
Configuration file for all AS99x firmware.
void as3993WaitForResponseFAST(u16 waitMask)
Definition: as3993.c:563
void as3993SingleCommand(u8 command)
Definition: as3993.c:448
void as3993CommandContinuousAddress(u8 *command, u8 com_len, u8 address, u8 *buf, u8 buf_len)
Definition: as3993.c:516
u8 as3993SingleRead(u8 address)
Definition: as3993.c:475
void as3993EnterDirectMode()
Enter the direct mode.
Definition: as3993.c:579
void as3993WaitForStartup(void)
after EN goes high the IRQ register has to be read after osc_ok goes high.
Definition: as3993.c:856
void as3993ExitPowerStandbyMode()
Exit the standby power down mode.
Definition: as3993.c:846
void as3993ExitPowerNormalMode()
Exit the normal power mode.
Definition: as3993.c:816
void as3993EnterPowerDownMode()
Enter the power down mode by setting EN pin to low, saving registers beforehand.
Definition: as3993.c:715
void as3993ContinuousRead(u8 address, s8 len, u8 *readbuf)
Definition: as3993.c:456
volatile u16 as3993Response
Definition: as3993.c:67
void as3993ExitPowerDownMode()
Exit the power down mode by setting EN pin to high, restoring registers afterwards.
Definition: as3993.c:747
void as3993ExitPowerNormalRfMode()
Exit the normal power mode with rf on.
Definition: as3993.c:831